From 9f169ced230317cb9a9dc84eef0ee81b3359bba5 Mon Sep 17 00:00:00 2001
From: "HuYingzhuo(hugo/hyzboy)" <hyzboy@gmail.com>
Date: Fri, 28 Jul 2023 18:13:32 +0800
Subject: [PATCH] added to the SOC GPU parse

---
 inc/hgl/platform/SOC.h | 64 ++++++++++++++++++++++++++++++++++++++----
 src/SOC/SOC.cpp        | 30 +++++++++++++++++---
 2 files changed, 84 insertions(+), 10 deletions(-)

diff --git a/inc/hgl/platform/SOC.h b/inc/hgl/platform/SOC.h
index 8dad08c..615f064 100644
--- a/inc/hgl/platform/SOC.h
+++ b/inc/hgl/platform/SOC.h
@@ -29,7 +29,7 @@ namespace hgl
         ENUM_CLASS_RANGE(Unknow,JLQ)
     };
 
-    constexpr const char *SOCVendorName[16]=
+    constexpr const char *SOCVendorName[]=
     {
         "Unknow",
         "Qualcomm",
@@ -41,6 +41,8 @@ namespace hgl
         "JLQ",
     };
 
+    const SOCVendor ParseSOCVendor(const char *str);
+
     enum class CpuArch
     {
         Unknow=0,
@@ -142,11 +144,61 @@ namespace hgl
      */
     bool ParseSOCInfo(SOCInfo &,const char *);
 
-    struct SOCCpuInfo
+    enum class SOCGPUVendor
     {
-        SOCInfo soc_info;
+        Unknow=0,
 
-        uint cluster_count;                 ///<CPU簇数量
-        ARMCpuClusterInfo cluster[4];       ///<CPU簇信息
-    };//struct SOCCpuInfo
+        PowerVR,
+        Mali,
+        Adreno,
+        Vivante,
+        Intel,
+        Radeon,
+        Tegra,
+        ENUM_CLASS_RANGE(Unknow,Tegra)
+    };
+
+    constexpr const char *SOCGPUVendorName[]=
+    {
+        "Unknow",
+
+        "PowerVR",
+        "Mali",
+        "Adreno",
+        "Vivante",
+        "Intel",
+        "Radeon",
+        "Tegra",
+    };
+
+    const SOCGPUVendor ParseSOCGPUVendor(const char *str);
+
+    struct SOCGPUInfo
+    {
+        SOCGPUVendor    vendor;
+        char            model[32];
+
+        uint            core_count;
+        uint            freq;
+    };
+
+    /**
+    * SOC 产品信息
+    */
+    struct SOCProductInfo
+    {
+        char                product_name[64];   ///<产品名称
+
+        SOCInfo             soc_info;           ///<SOC基本信息
+
+        SOCGPUInfo          gpu_info;           ///<GPU信息
+
+        uint                cpu_cluster_count;  ///<CPU簇数量
+        struct
+        {
+            char            core[32];           ///<CPU核心名称
+            uint            count;              ///<核心数量
+            float           freq;               ///<频率
+        }cpu_cluster[4];                        ///<CPU簇信息
+    };//struct SOCProductInfo
 }//namespace hgl
diff --git a/src/SOC/SOC.cpp b/src/SOC/SOC.cpp
index 18b4cdc..4c9ff3d 100644
--- a/src/SOC/SOC.cpp
+++ b/src/SOC/SOC.cpp
@@ -55,9 +55,7 @@ namespace
 
         soc.vendor=SOCVendor::MediaTek;
 
-        p+=2;
-
-        hgl::strcpy(soc.model,sizeof(soc.model),p,4);
+        hgl::strcpy(soc.model,sizeof(soc.model),p);
 
         return(true);
     }
@@ -92,7 +90,7 @@ namespace
 
         soc.vendor=SOCVendor::Hisilicon;
 
-        hgl::strcpy(soc.model,sizeof(soc.model),p+5);
+        hgl::strcpy(soc.model,sizeof(soc.model),p);
 
         return(true);
     }
@@ -152,6 +150,30 @@ namespace
 
 namespace hgl
 {
+    const SOCVendor ParseSOCVendor(const char *str)
+    {
+        if(!str||!*str)return(SOCVendor::Unknow);
+
+        int index=hgl::find_str_in_array<char>(int(SOCVendor::RANGE_SIZE),(const char **)SOCVendorName,str);
+
+        if(index<0||index>=int(SOCVendor::RANGE_SIZE))
+            return(SOCVendor::Unknow);
+
+        return SOCVendor(index);
+    }
+
+    const SOCGPUVendor ParseSOCGPUVendor(const char *str)
+    {
+        if(!str||!*str)return(SOCGPUVendor::Unknow);
+
+        int index=hgl::find_str_in_array<char>(int(SOCGPUVendor::RANGE_SIZE),(const char **)SOCGPUVendorName,str);
+
+        if(index<0||index>=int(SOCGPUVendor::RANGE_SIZE))
+            return(SOCGPUVendor::Unknow);
+
+        return SOCGPUVendor(index);
+    }
+
     bool ParseSOCInfo(SOCInfo &soc,const char *soc_name)
     {
         hgl_zero(soc);